A conventional universal timer/counter (UTC) makes single-shot pulse duration measurements by counting the number of periods of the master clock that occur between the beginning and end of the pulse to be measured. The resolution of the UTC is therefore limited by the master clock period. FIG. 1 illustrates an arrangement which permits the measurement resolution of the UTC to be improved. As shown in FIG. 1, the input pulse is applied to a timer 2 and to a start error pulse generator 4 and a stop error pulse generator 6. The start error pulse generator generates a start error pulse of duration equal to the interval between the beginning of the input pulse to be measured and the arrival of the next subsequent clock edge. Similarly the stop error pulse generator generates a stop error pulse of duration equal to the interval between the end of the input pulse to be measured and the arrival of the next subsequent clock edge. The start and stop error pulses are used to charge respective capacitors. The capacitors are later discharged at a known lower rate and the time that each capacitor takes to discharge is measured. If, for example, the discharge rate is one hundredth of the charge rate, the discharge time would be one hundred times the error time, and if the discharge time is measured with the clock's resolution, the single-shot resolution of the UTC is improved by a factor of one hundred. Such capacitive pulse stretchers are well known.
The start error pulse generator shown in FIG. 1 is of conventional form.
Before carrying out a measurement, the pulse generator is armed by placing each of the flip-flops 12 and 14 in its reset condition, so that each of them has a logical 0 (low) at its Q output terminal and a logical 1 (high) at its /Q output terminal. The pulse generator is then enabled by placing a logical 1 at the D input terminal of the flip-flop 12.
The input pulse to be measured is applied to the pulse generator by way of a signal input terminal 16, which is connected to the clock input terminal of the flip-flop 12. The input pulse is also applied to the timer 2 and to the stop time pulse generator 6. The start of the input pulse is marked by a positive-going transition at the terminal 16, from logical 0 to logical 1. In response to this transition, the Q terminal of the flip-flop 12 goes high and its /Q terminal goes low. When the /Q terminal of the flip-flop 12 goes low, the NOR gate 18 receives two low inputs and the output of the NOR gate goes high. This is the start of the start error pulse. When the next subsequent clock edge occurs, it is applied to the clock input terminal of flip-flop 14 and the Q terminal of the flip-flop 14 goes high and the output terminal of the NOR gate 18 goes low, marking the end of the start error pulse.
The stop error pulse generator 6 responds to the negative-going transition at the end of the input pulse and generates a stop error pulse having a duration equal to the difference between the time of arrival of the negative-going transition and the next subsequent clock edge.
The timer 2 counts the number of pulses between the first clock edge and the clock edge following the end of the input pulse.
The duration of the pulse to be measured is then equal to the number of clock periods counted by the timer 2 multiplied by the clock period, plus the duration of the start error pulse, minus the duration of the stop error pulse.
In order to provide accurate and consistent measurements, it is necessary to calibrate the capacitive pulse stretcher and its associated circuitry. In many applications, good measurement practice requires that the pulse stretcher be calibrated once per measurement. Conventional start and stop error pulse generators do not permit calibration of the pulse stretcher without interfering with the pulse generators when in the measurement mode.